1. Field of the Invention
The present invention relates to a technique of controlling a voltage and a current inputted to an inverter driving a motor, and in particular to a power factor compensation device for a motor driving inverter which can compensate a power factor of a voltage and a current inputted to the motor driving inverter.
2. Description of the Background Art
Gradually, an inverter has been increasingly utilized to control a motor for home appliances due to reduction in energy consumption and easiness in output control. Various home appliances including a washing machine and a refrigerator have used an inverter for driving a motor.
FIG. 1 is a structure diagram illustrating a conventional motor driving inverter system. As shown therein, an inputted alternating current power 100 is full-wave rectified by a bridge diode 111 into a direct current voltage. The rectified voltage is smoothed through a choke coil 112 and a smoothing condenser 113, and supplied to an inverter 120. The smoothed direct current voltage is greater than a peak value of the alternating current power voltage. The inverter 120 converts the smoothed direct current voltage into a three phase alternating current power, and supplies it to a motor 130. The motor 130 is driven by the converted three phase alternating current power.
FIG. 2 is a waveform diagram of each unit in the conventional art. A first waveform and a second waveform are voltage and current waveforms of the alternating current power, respectively. A time (t) is determined by a time constant by the choke coil 112 and the smoothing condenser 113, and normally set to be approximately 1/5 of a period of the alternating current power. On the other hand, the peak value of the current is rapidly generated during the time (t). As a result, a noise takes place due to the peak value, and a loss happens due to unavailable power. The aforementioned disadvantage results from a power factor by a phase difference between the voltage and the current. A third waveform of FIG. 2 shows an ideal current pattern of the alternating current power. As shown therein, when a current having an identical phase to a phase of the alternating current power voltage is applied to the inverter, a loss resulting from the unavailable power is removed.
In order to generate a current having such a waveform, a device having a power factor improvement function is shown in FIG. 3.
FIG. 3 is a structure diagram illustrating a conventional power factor compensation device for the inverter system. Here, a power factor compensation unit 200 is further included in the configuration of FIG. 1. The power factor compensation unit 200 includes: the choke coil 112, an analog integrated circuit 210, a plurality of resistances R1-R13, a plurality of condensers C1-C3 and a plurality of diodes D1, D2. FIG. 4 is a detailed circuit diagram illustrating the analog integrated circuit 210. As shown therein, the analog integrated circuit 210 includes various logic circuits.
The direct current voltage outputted from a bridge diode 111 is divided by the resistances R1, R2 of the power factor compensation unit 200, and inputted to the integrated circuit 210 through a terminal 3VM1. The voltage applied to the choke coil 112 is inputted thereto through the resistance R5 and a terminal 5Idet. The voltage of the choke coil 112 passing through the resistance R4 and the diode D1 and the voltage of the bridge diode 111 passing through the resistance R3 become an inside power VCC of the integrated circuit 210. In addition, the direct current voltage supplied to the inverter 120 through the choke coil 112 and the diode D2 is divided by the resistances R11, R12, R13, and inputted to the integrated circuit 210 through a terminal 1INV The voltage is inputted to a terminal 2COMP after the time constant is controlled by the resistances R7, R8 and the condenser C2. In addition, a voltage corresponding to a current supplied to the inverter 120, namely a voltage passing through the condenser C3 is inputted to a terminal 4CS.
A voltage Vout having a predetermined duty rate is outputted through a terminal Vout by the various logic circuits in the integrated circuit 210 receiving the voltages, that is comparators 211, 216, 218, 219, a multiplexer 217, an inverter I1, NAND gates 213, 214, a self-starter and a NOR gate 215.
FIG. 5 shows waveforms of the voltages processed in the integrated circuit 210. Reference mark `MO` denotes a waveform of a voltage inputted from the multiplexer 217 to the comparator 216, and `CS` denotes a waveform of a voltage inputted to the comparator 216 through the terminal 4CS. As depicted in FIG. 5, MO and CS are compared, and the voltage Vout has a great duty at a portion where a sine wave is small (right and left sides in the drawing), and a small duty at a middle portion.
The voltage Vout is applied to a gate of a switching transistor Q1, and thus the switching transistor Q1 repeatedly performs a switching operation, thereby removing a phase difference between the voltage and current inputted to the inverter 120. Accordingly, the conventional power factor compensation device compensates the power factor by further including the power factor compensation unit, and thus removes the loss. However, there are disadvantages as follows.
Firstly, the power factor compensation unit must constantly receive the alternating current power voltage. Secondly, since the analog power factor compensation circuit is employed, an area for the circuit is increased. Accordingly, a cost thereof is also increased.